The present invention generally relates to semiconductor devices having a package and more particularly to a semiconductor device having solder bumps on a lower major surface of a package body.
Semiconductor devices are generally required to have a small package size. Further, such semiconductor devices should have a package easy for mounting on an apparatus in which the semiconductor device is used. Conventional packages typically have interconnection leads extending laterally from both side walls of the package body. Such conventional packages have a problem in that the pitch of the interconnection leads becomes excessively small, on the order of 0.3 mm or less, with an increasing number of the interconnection leads, without a corresponding increase in the package size. With such a small pitch of the interconnection leads, the mounting of the semiconductor device on a printed circuit board of an apparatus is extremely difficult. In order to increase the pitch of the interconnection leads for easy mounting, on the other hand, one has to increase the package size and hence the area that the semiconductor device occupies.
In order to circumvent this problem, a so-called ball grid array package is proposed, wherein a number of solder bumps each forming a terminal, are arranged in rows and columns on the lower major surface of the package body. In such a construction, one can use substantial area of the package body for the interconnection, and the problem of reduced pitch between the interconnection leads is successfully avoided.
Meanwhile, recent semiconductor devices having an increased integration density generally show an increased heating due to the increased number of semiconductor devices in the integrated circuit. Thus, the semiconductor devices nowadays are required to show an excellent heat dissipation characteristic.
FIG. 1 shows a typical conventional semiconductor device 10 disclosed in the U.S. Pat. No. 5,136,366.
Referring to FIG. 1, the semiconductor device 10 includes a package substrate 12 having a number of solder bumps 11 on a lower major surface thereof, and a semiconductor chip 13 is mounted upon an upper major surface of the package substrate 12. The semiconductor chip 13 carries thereon a number of bonding pads for external connection, while the package substrate 12 carries corresponding interconnection pads on the upper major surface of the package substrate 12. Further, the bonding pads on the semiconductor chip 13 and the interconnection pads on the package substrate 12 are interconnected by bonding wires. Further, a resin package body 15 encapsulates the semiconductor chip 13 by covering the upper major surface as well as side walls of the chip 13. The semiconductor device 10 thus formed is mounted firmly upon a multiple-layer printed circuit board 16 as indicated in FIG. 2 by means of brazing or soldering of the solder bumps on the lower major surface of the package substrate 12 upon corresponding terminal pads 17 of the printed circuit board 16.
In such a structure, it should be noted that the heat generated in the semiconductor chip 13 is conducted through the resin package body 15 and is radiated to the environment from the upper major surface as well as side walls of the package body 15, while it is known that the radiation of heat from a resin package body to the environment is not efficient. Thus the package body 15 of the semiconductor device tends to be heated to a high temperature upon operation of the semiconductor devices in the integrated circuit, while such a temperature elevation decreases the efficiency of heat transfer through the resin package body 15. Thus, the temperature of the device increases further with continued operation of the device.
Further, the conventional semiconductor device 10 has a problem in that moisture in the environment tends to penetrate inside the resin package body 15 along a boundary 18 between the package substrate 12 and the resin package body 15. It should be noted that the boundary 18 is exposed at a circumferential edge 19 of the package body 15. When such moisture penetrate to the boundary 18, there is a substantial risk that the bonding wires 14 are subjected to corrosion, while such a corrosion may ultimately lead to premature disconnection of the bonding wires 14 and hence the failure of the semiconductor device.